For transmitting data in the full-duplex process, whereby data are both sent and received via the transmission line, generally the problem arises in a corresponding transceiver that each transceiver-generated transmission impulse, which is required to be sent via the same data transmission line, overlays and thus corrupts a signal received from the transceiver via the same data transmission line by cross modulation referred to as “echo”. It is therefore state of the art to generate in the transceiver a replica that is as faithful as possible to each transmission impulse, referred to here as a “replica impulse”, whereby the replica impulses can then be injected for echo and/or transmission impulse compensation on the receiver section of the transceiver, so that by subtracting this replica signal from the incoming signal an echo-compensated incoming signal can be received.
FIG. 9 as an example shows a circuit topology for the transmission path of such a transceiver according to the state of the art, whereby a digital/analogue converter 1 driven by control bits is illustrated, which in turn drives a line driver 3. The digital/analogue converter 1 and the line driver 3 are component parts of the transmitter of a combined transmitting and receiving device and/or a transceiver, whereby the transmission signal picked up at the outputs of the line driver 3 is fed via a converter 4 into a data transmission line, which is illustrated in FIG. 9 simplified by way of a load resistor 5. In order to produce an exact reproduction and/or replication of the transmission impulses of the line driver 3, the transmission signal has often been picked up externally, at the output of the transmitter and/or line driver 3 and fed via an external hybrid integrated circuit on the input of the receiver of the corresponding transceiver for echo compensation. With modern circuit topologies however this external hybrid integrated circuit is integrated on-chip for impedance matching and/or impedance correction, so that, as shown in FIG. 9, a replica 2 of the digital/analogue converter 1 is for example provided, the output of which is connected with an internal hybrid integrated circuit (not shown in FIG. 9) for echo compensation, whereby this internal hybrid integrated circuit is positioned with the line driver 3 on the same chip. The border between the internal component parts of the transceiver and the external wiring is indicated in FIG. 1 by a broken line. The advantage of this technology, apart from the large-scale integration, is the reduction in the requirement for analogue components in the receiving path of the transceiver, such as for example with regard to the dynamic range or to the resolution of the analogue/digital converter provided there.
With low-frequency applications, for example with ISDN/xSDL data transmission, this replica impulse can be made available with the aid of a parallel, additional internal line driver 3′ having lower power consumption, which thus reproduces the behaviour of the actual line driver 3 and is coupled on the output side with a corresponding internal hybrid integrated circuit. An example of circuit topology of this kind is illustrated in FIG. 10.
A substantial problem here however is the adjustment of the replica path, also known as “matching”. Here not only common component or DC errors (relating to offset and amplitude) but also transient error components (parasitic effects and band limitation effects) are of importance. The circuit technology used with circuit arrangements of this kind is often based on so-called OPA structures or generally on circuit configurations with feedback, for example so-called “shunt series”, or “shunt-shunt” feedback arrangements. Although in principle higher linearity can therefore be obtained as a consequence of the feedback, at the same time bandwidth loss or higher power consumption for echo compensation results. Also relatively high complexity is necessary to generate the replica impulses, whereby over and above this in particular with high frequency systems high frequency oscillations can often occur due to cross modulation in the case of inappropriate circuit topology, which possibly limits the functionality of the entire circuit.
Therefore the object according to the present invention is to provide a line driver for transmitting data, with which the problems described above do not arise and the closest possible reproduction and/or replication of the transmission signals of the line driver can be generated with minimal technical circuit complexity.